1. Field of the Invention
This invention relates to computer circuitry and, more particularly, to methods and apparatus for accelerating the operation of computer processors.
2. History of the Prior Art:
Reduced instruction set (RISC) computers offer advantages in speed over other computers because they are able to execute an instruction almost every clock cycle. This is accomplished by pipelining (overlaying in time) the various stages of each operation so that each instruction execution is followed by the execution of the next instruction. Pipelining functions well so long as the instructions each included the same number of individual operations, usually fetch, decode, execute, and write back. However, certain instructions such as load and store instructions generally require more individual operations because they require sending information off the processor chip or retrieving information from off the chip or because more individual steps need to be accomplished. Reducing the time required for the execution of load and store operations in computers which utilize pipelining techniques is consequently of great importance to system speed.